Serial Communication
UART
Half-UART - Receive (34 - 152 CSL Cells)
Half-UART - Transmit (22 - 146 CSL Cells)
Full UART with Modem Control (152 - 360 CSL Cells)
Master SPI (45 - 66 CSL Cells)
Slave SPI (170 Cells (with 16byte fifo)
Baud Rate Generator (12 CSL Cells)
Programmable Baud Rate Generator (21 CSL Cells)
Two-Wire Serial Interface (I2C-compatible)
Two-wire Master Only (256 CSL Cells)
Two-wire Slave Only (109 CSL Cells)
Two-wire Master/Slave (160 CSL Cells)
HDLC Transmitter and Receiver (300 CSL Cells)
I2S
Transmitter (78-85 CSL Cells)
Receiver (73 - 78 CSL Cells)
Logic Functions
Reloadable Binary Counter (3 - 50 CSL Cells)
Adder-Loadable (8 - 48 CSL Cells)
Accumulator (8 - 48 CSL Cells)
Comparator (8 CSL Cells)
Multiplier (2 - 256 CSL Cells)
Data Register (1 - 32 CSL Cells)
Shift Register (1 - 32 CSL Cells)
Four-input LUT (1 CSL Cell)
Constant (0 CSL Cells)
Swapper (8 CSL Cells)
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Memory
Dual Port RAM (17 - 1121 CSL Cells)
ROM (1 - 48 CSL Cells)
FIFOs
Asynchronous FIFO (15 - 1140 CSL Cells)
Asynchronous Receive FIFO (16 - 1141 CSL Cells)
Asynchronous Transmit FIFO (16 - 1141 CSL Cells)
Req/Ack Receive FIFO (31 - 214 CSL Cells)
Transmit FIFO (33 - 216 CSL Cells)
Display Driver
7 Segment Display (7 CSL Cells)
LCD Character Display (13 CSL Cells)
Graphic LCD Display Controller (120 - 350 CSL Cells)
Control
Command Register (1 - 32 CSL Cells)
Status Register (14 - 25 CSL Cells)
Interrupt Expander (16 CSL Cells)
8-bit Pulse Width Modulator (16 CSL Cells)
Mailbox Interface (16 CSL Cells)
I/O
Inputs/Outputs
3-State Outputs
Bi-Directional
8051-style PIO Port (4 CSL Cells)
Encryption
Triple DES (875 CSL Cells)
Single DES ECB (731 CSL Cells)
Single DES CBC (1169 CSL Cells)
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